1. Field
The present disclosure generally relates to the design of a semiconductor die. More specifically, the present disclosure relates to a semiconductor die that includes a spatial alignment transducer with a spatially varying electric charge distribution that facilitates determining a spatial alignment between the semiconductor die and another semiconductor die.
2. Related Art
Proximity communication (PxC) is an input/output (I/O) technology that allows two face-to-face chips to communicate without wires. Although it promises much higher I/O density and lower power, chips that communicate using PxC typically must be well aligned so that signals are well coupled between the transmitting and receiving pads. If misalignment occurs, for example, at initial assembly or during system operation, channel crosstalk and potential bit errors can result.
Depending on the chip separation, a variety of techniques have been proposed to correct physical misalignment, including electronic alignment correction and by adaptation of the driving voltage levels. However, these techniques usually involve measuring the physical misalignment using on-chip position sensors.
However, determining the chip separation using on-chip position sensors often involves precision measurements. For example, determining the chip separation by measuring coupling capacitances typically involves precise measurements of very small currents in the nanoAmp range. These currents are comparable to transistor leakage currents, which can compromise measurement accuracy. Furthermore, this problem is expected to become progressively worse as critical dimensions are scaled to 90 nm and beyond, where the leakage currents can dominate the small signal currents, which may make it infeasible to extract the current signal. In addition, the leakage current varies with temperature, which makes it difficult to remove during a calibration process.
In principle, determining the chip separation by measuring voltages may be less prone to error due to leakage currents. However, to date this has proven extremely difficult. For example, while it is theoretically possible to infer the chip-to-chip coupling capacitance, and thus the chip-to-chip separation, from the voltage amplitude of a signal coupled from one chip to another, in practice this simple measurement is difficult because of the uncertainty in the parasitic capacitances on the receiving chip. In particular, the voltage amplitude measured on the receiving chip is Vr=[Cc/(Cc+Cr)]·Vt, where Vr and Vt are, respectively, the received and transmitted signal amplitudes, Cc is the chip-to-chip coupling capacitance, and Cr is the parasitic capacitive load at the receiving node.
Hence, what is needed is a semiconductor die that facilitates determining chip alignment without the problems described above.